In recent years, accompanying the miniaturization of wiring in semiconductor integrated circuits, signal delay problems can occur. To solve these problems, there has been proposed a method for lowering the wiring resistance using copper as wiring material, and a method for lowering capacitance using a low-dielectric-constant film (low-k dielectric film) as an interlayer insulating film.
FIG. 4 is a schematic sectional view for illustrating a semiconductor device according to background art.
In order to solve the problems of the above-described signal delay, in a semiconductor device having a pad region A and a circuit region (device region) B, as FIG. 4 shows, low-k dielectric film is applied to the entire surface of a substrate as interlayer insulating films 11, 21, 31 and 41.
When the above-described semiconductor device having low-k dielectric film applied to the entire surface of a substrate is packaged, physical impact is exerted to the low-k dielectric films 11, 21, 31 and 41 formed in the pad region A.
However, since physical properties, such as strength, possessed by the low-k dielectric film is 1/10 (one-tenth) or less of physical properties possessed by a silicon oxide film (SiO2 film), there has been a problem of a small margin to the impact exerted during packaging.